Can’t we just use lots of DRAMs in parallel?
Buffer
Memory
Buffer
Memory
Buffer
Memory
Buffer
Memory
Buffer
Memory
Buffer
Memory
Buffer
Memory
Buffer
Memory
40B
320B
320B
320B
Write Rate,
R
Read Rate,
R
Buffer Manager
One 40B packet
every 8ns
One 40B packet
every 8ns
Scheduler
Requests
28