| The Parallel Shared Memory Router |
| At most one
operation – a write or a read per time slot |
| A5 |
| Memory |
| 1 |
| A4 |
| Memory |
| A3 |
| A |
| R |
| Memory |
| A4 |
| A1 |
| A1 |
| B |
| A5 |
| Memory |
| B1 |
| C3 |
| R |
| C |
| Memory |
| C3 |
| C1 |
| B3 |
|
|
| Arriving |
|
| Packets |
|
|
|
| Departing |
|
| Packets |
|
| Memory |
| B1 |
| Memory |
| K=8 |
| C1 |
| From theorem 1, k = 7 memories don’t
suffice .. but 8 memories do |
| 11 |